Venue | Press Room | Subscribe | Site Map
TechConnect Summit 2006
Home | About the Summit | Program | Advisory Boards | About TechConnect

Producing Sponsor

TechConnect

Platinum Sponsor

Welsh & Katz, Ltd.

Gold Sponsor

ISTC International Science & Technology Center

Ventures Enabling Sponsor

Atomic Venture Partners

Press Sponsor

Business Wire

Partnering Sponsor

NSTI

Supporting Organizations

Boston University
Midwest Research University Network

Media Sponsors

(joint with Nanotech 2006) Nature
Science
R&D Magazine

Summit News

Event Contact

Jennifer Rocha
955 Massachusetts Ave. #313
Cambridge, MA 02139
Phone: (774) 249-8514

Circuit Calibration using voltage injection

Organization:Gestion Univalor, Limited Partnership, Quebec, CA
I.P. Brief:A digital background calibration technique to compensate for the nonlinearity and gain error in the sub-digital-to-analog converter (SDAC), and the operational amplifier finite dc gain in multi-bit/stage pipelined analog-to-digital converter (ADC) is proposed. This is mainly obtained by injecting subtractive calibration voltages in the digital-to-analog converter and performing correlation measurements.
Summary of I.P.:Calibration of precision circuits is of paramount importance. When a component value is calibrated and an error is detected, a physical component value can be used to compensate this error or this can be done externally. Two general calibration methods are currently used: background calibration; and foreground calibration. In foreground calibration, operation of the circuit is stopped while calibration is carried out, While in background calibration, circuit operation continues while calibration is carried out. In the case of calibrating a device, such as an analog-to-digital converter (ADC), there is significant advantage to being able to maintain precision of the device through background calibration without removing the device from normal continuous use. None of common processes addresses this issue. Analog to digital converters (ADCs) are omnipresent in all new telecommunication and sensor systems and time interleaved ADCs are inevitable when increasing the speed is desired with high resolution ADCs to overcome the technology limits.
Patent:- US 11/071,885: Circuit Calibration using voltage injection (not yet publicy disclosed)
Keywords:Analog-to-digital converter, ADC, calibration, reference voltage
Primary Industry:Electronics
Specific Market:Electronics in Telecommunication, Sensing and Instrumentation
Market Size:ADC represent a 1 billion dollars market, with an important CAGR of the specific pipelined ADCs of 10% for the last years. The major drivers of this market are: - Evolving demand from the telecommunication industry; - Replacement of flash architecture
State of the Art:2 calibration methods are currently used: background; and foreground. In foreground calibration, operation of the circuit is stopped during calibration, while in background calibration, circuit operation continues during calibration. Improvements have been proposed to addresses the limitation of these two main solutions, but failed to offer a universal method.
Competition:In the ADC market, pipeline ADC is expected to gain the highest growth, while currently representing at least a quarter of the market. A novel calibration should be able to follow the rapid evolution of the industry.
Figures of Merit:Potential universal solution to ADCs calibrations. It doesnot need an accurate reference voltage or an increasing in the SDAC resolution to operate while improving the linearity performances (single and multi-channel pipelined ADC). It proposes to benefit from advantages of background and foreground calibration techniques, without the penalties associated with.
Tech.  Obstacles:- Each application of the technique will require a development (potential IP Core); - The proposed technology seems disruptive then will encounter huge technical barriers, since designers shall have to change the way they used to calibrate ADCs; - Enabling the realization of ADCs in deep-submicron technology.
Market Obstacles:- Find a critical application that would make it possible to prove the added value of the technique; - Reach the tremendous number of potential users in the various industries and related companies; - There could be few applications where added-value justifies the paradigm shift; - A key feature to catalyze the adoption of the technology might be to get a system-on-chip early adopter of technology.
Patent Landscape:US Patent 11/071,885
Publications:- A Background Calibration Technique for Multibit/Stage Pipelined and Time-Interleaved ADCs, Kamal El-Sankary, and Mohamad Sawan, Fellow, IEEE, IEEE Transaction on Circuits and Systems-II. in press - High speed ADCs dedicated for wideband wireless receivers Sawan, M.; Djemouai, A.; El-Sankary, K.; Dang, H.; Naderi, A.; Savaria, Y.; Gagnon, F.; IEEE-NEWCAS Conference, 2005. The 3rd International 19-22 June 2005 Page(s):283 – 286 - High resolution self-calibrated ADCs for software defined radios El-Sankary, K.; Sawan, M.; Microelectronics, 2004. ICM 2004 Proceedings. The 16th International Conference on 6-8 Dec. 2004 Page(s):120 - 12 - A new time-interleaved architecture for high-speed A/D converters El-Sankary, K.; Assi, A.; Sawan, M.; Digital and Computational Video, 2002. DCV 2002. Proceedings. Third International Workshop on 14-15 Nov. 2002 Page(s):93 – 99
Research Team:Mohamad A. Sawan is currently a Professor in Microelectronics and heads the ReSMiQ research Center and the PolySTIM research Laboratory. Kamal El-Sankary is a Ph.D. student working along with Professor Sawan on high-resolution wide bandwidth ADCs.

 

Home | About the Summit | Program | Advisory Boards | About TechConnect
Terms of use | Privacy policy | Contact | TechConnect Home
© 2005 TechConnect. All rights reserved.