Systine Inc.
| Location: | CA, US | | Speaker: | H.P. (Pat) Gillis, Ph.D | | Title: | CEO, CTO, Co-Founder | | Primary Industry: | Semiconductor processing equipment | | Executive Summary: | Systine provides a fundamentally new etching process and etch processing tool set for precision, damage free etching of semiconductor materials to enhance today’s leading edge 65nm production yields and to meet the industry\'s 45nm, 32 nm, and sub-32nm roadmap requirements.
The Low Energy Electron Enhance Etching (LE4) technology utilizes a low energy, dc electron discharge and neutral chemical etching species to drive a highly selective etching reaction that has demonstrated the ability to etch precision device features at dimensions of less than 20nm with a surface finish that approaches atomic smoothness. This represents a significant advancement over traditional ion enhanced (dry) etching that relies on the momentum transfer of rf field accelerated reactive ions to perform etching, which also creates unavoidable material damage that degrades semiconductor device yields and performance.
Systine’s patented LE4 technology breakthrough and its Gradina etching tool set will play a major role in helping the semiconductor industry keep pace with the demands of extending Moore’s Law to the ultimate limits at an atomic scale allowing Systine to become a leading supplier to the $5 billion etch equipment market in 2010 and beyond.
| | Venture is: | Seed Level |
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