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Fujitsu Develops Clock Distribution Circuit for High-Speed, Low-Power Data Transmission between CPUs

June 23, 2013 08:57 AM EST By: Jennifer Rocha

Company wants to contribute to the next generation of higher performance servers and supercomputers through a 20% reduction in transceiver circuit power consumption.
Story content courtesy of Fujitsu, JP

Fujitsu Laboratories Limited and Fujitsu Laboratories of America, Inc. announced the development of a clock distribution circuit that enables a 20% reduction in the power consumed by the transceiver circuits in next-generation servers that transmit data between CPUs.

By building a tiny oscillator circuit into each transceiver and synchronizing the oscillators, Fujitsu researchers succeeded in developing a low-power clock distribution method that eliminates the need to use conventional clock distribution circuits.

It is expected that this technology will contribute to increasing the performance of the next generation of servers and supercomputers.

 

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