Terepac Corporation is developing a proprietary process to facilitate production of novel end products unencumbered by lower limit chip size. This breakthrough process unleashes Moore’s Law cost, form and function advantages to create a galaxy of new products, new markets and new customers.
Founder & CEO: Ric Asselstine
Industry: Semiconductor, Electronics
Venture is: Seed
Company Profile Courtesy of R. Asselstine, Terepac Corporation
Moore’s Law has enabled chips whose size and cost have diminished in step with transistor dimensions to a degree scarcely imaginable, and which could make end products possible whose markets would dwarf those of existing integrated circuits. Despite intense interest in these applications, their benefits in value, form and function remain unattainable with current semiconductor packaging and assembly techniques.
Terepac Corporation believes it is a pioneer in semiconductor packaging and assembly and flexible electronic footprint miniaturization, and its rapidly developing breakthrough semiconductor packaging method. With no theoretical lower limit on chip size deployable, the entire gamut of products exploiting distributed, ubiquitous electronics will be made available, creating huge new markets and new customers for new (especially flexible) form factors. These products cover a wide range of complexity from item level low cost RFID to multifunction smart labels; from edge of the network sensor nodes to high end medical and industrial instrumentation. The process, combining the performance of silicon with the economics of printing, aims to enable electronics everywhere.
Terepac was selected to present at the Tech Connect Summit next month in Boston, MA, as the company continues its industrial, commercial, institutional and supply partner ecosystem expansion.