L. Zhang, C. Ma, M. Chan
Hong Kong University of Science and Technology, Hong Kong
pp. 299 - 303
Keywords: reliability, circuit aging simulation, reliability-aware modeling
Device reliability and circuit aging are becoming key design concerns with advanced CMOS technologies. In the traditional way, a reliability model describing the device parameter shifts in the time domain is independent of a device compact model with only static and constant parameters. Correspondingly, a separate routine outside of the device model routine in SPICE is needed to calculate the device degradation. Circuit waveforms extracted from SPICE simulations are inputs to the reliability routine and aged device parameters are derived by looking up a table of measurement data. This simulation method works for some reliability modules like the hot carrier injections, with room for efficiency improvements. However, it does not work well with bias temperature stabilities in which direct formula calculations are used instead of a table lookup. First, the stress feedback effect which appears intrinsically in the age table is missing in the direct prediction. Second, the impacts of circuits self-heating on their aging which is important especially in advanced technologies cannot be captured. To cope with these challenges, a reliability-aware device modeling method is proposed by integrating a reliability module into a device compact model. The stress feedback is simultaneously included in the model evaluations. At the same time, the temperature effects and other possible coupling between different reliability modules are taken into consideration. Requirements on and from the reliability modules are analyzed from the perspective of SPICE transient simulations. Figure-of-merits of a circuit aging simulation method like the accuracy, efficiency and stability, are discussed. Several examples of long term circuit aging simulations are used to demonstrate the obtainable features from the developed reliability-aware modeling and simulation method.