N. Gupta, A. Kumar, R. Chaujar
Delhi Technological University, India
pp. 185 - 188
Keywords: gate engineering, silicon nanowire, extrinsic parameters and RF
In this paper, extrinsic parameters of Gate Electrode Workfunction Engineered (GEWE) Silicon Nanowire MOSFET is analyzed in terms of parasitics capacitances, resistances and inductances using 3D-TCAD device simulations. The extracted parameters have been compared with those of conventional SiNW MOSFET with identical device geometry. All simulations have been performed using ATLAS and DEVEDIT-3D device simulators. In our simulation, we have adopted the Bohm Quantum mechanical model.Simulation results shows the intrinsic source, drain and gate resistances are comparatively lower in comparison to SiNW MOSFET. Also, the bias dependent parasitic capacitances of GEWE-SiNW MOSFET turned out to be smaller than that of SiNW MOSFET.